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MPC755BTXPNS/D Rev. 0, 4/2002 MPC755 Part Number Specification for the XPC755BxxnnnTx Series
Motorola Part Numbers Affected: XPC755BRX350TD XPC755BRX400TD XPC755BRX350TE XPC755BRX400TE
This document describes part-number-specific changes to recommended operating conditions and revised electrical specifications, as applicable, from those described in the general MPC755 RISC Microprocessor Hardware Specifications (Order No. MPC755EC/D). Specifications provided in this document supersede those in the MPC755 RISC Microprocessor Hardware Specifications, Rev. 4 or later, for the part numbers listed in Table A only. Specifications not addressed herein are unchanged. Because this document is frequently updated, refer to http://www.motorola.com/semiconductors or to your Motorola sales office for the latest version. Note that headings and table numbers in this document are not consecutively numbered. They are intended to correspond to the heading or table affected in the general hardware specification. Part numbers addressed in this document are listed in Table A. For more detailed ordering information see Section 1.10, "Ordering Information." Note that signficant differences exist between Rev. 2.7 (Rev. D) and Rev. 2.8 (Rev. E) devices. All such differences are detailed in this specification.
General Parameters Table A. Significant Differences from Hardware Specification by Part Number
Operating Conditions Motorola Part Number1 XPC755BRX350TD XPC755BRX400TD CPU Frequency 350 MHz 400 MHz VDD2 2.0 V 100 mV TJ (C) -40 to 105 Significant Differences from Hardware Specification Extended operating temperature; 2.0 V/1.8 V I/O voltage supported, 2.5 V I/O not supported; all nominal core voltages are 2.0 V 100 mV; AC timing different for processor bus and L2 bus interfaces; L2 bus interface AC timing not guaranteed in 1.8 V/2.0 V mode. Extended operating temperature
XPC755BRX350TE XPC755BRX400TE
350 MHz 400 MHz
Notes: 1. The X prefix in a Motorola PowerPC part number designates a "Pilot Production Prototype" as defined by Motorola SOP 3-13. These are from a limited production volume of prototypes manufactured, tested, and Q.A. inspected on a qualified technology to simulate normal production. These parts have only preliminary reliability and characterization data. Before pilot production prototypes may be shipped, written authorization from the customer must be on file in the applicable sales office acknowledging the qualification status and the fact that product changes may still occur while shipping pilot production prototypes. 2. Nominal. See Table 3 for recommended operating conditions
There are currently no known errata for the part numbers addressed by this document.
1.3 General Parameters
The general parameters that follow apply to the part numbers described herein: Core power supply I/O power supply 2.0 V 100 mV DC (nominal; see Table 3 for recommended operating conditions) 1.8 V 100 mV DC (processor bus interface only; not supported on L2 interface; XPC755BRX350TD and XPC755BRX400TD only), or 2.0 V 100 mV DC (processor bus interface only; not supported on L2 interface; XPC755BRX350TD and XPC755BRX400TD only), or 2.5 V 125 mV DC (XPC755BRX350TE and XPC755BRX400TE only), or 3.3 V 165 mV DC
1.4.1 DC Electrical Characteristics
The Rev. D devices support 3.3 V and 1.8 V/2.0 V I/O voltages, but do not support the 2.5 V I/O voltages supported by Rev. E devices. Note that Rev. E devices do not support 1.8 V/2.0 V I/O. Table 2 describes the input threshold voltage settings. Though unchanged from the MPC755 RISC Microprocessor Hardware Specifications, input threshold voltage settings for Rev. E devices are also included for clarity.
2
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
MOTOROLA
General Parameters Table 2. Input Threshold Voltage Setting
Processor Bus Interface Voltage BVSEL Signal 0 1 XPC755RX350TD XPC755RX400TD 1.8 V or 2.0 V 3.3 V XPC755RX350TE XPC755RX400TE N/A 2.5 V or 3.3 V L2VSEL Signal 0 1 L2 Bus Interface Voltage XPC755RX350TD XPC755RX400TD 1.8 V or 2.0 V 3.3 V XPC755RX350TE XPC755RX400TE N/A 2.5 V or 3.3 V
Caution: The input threshold selection must agree with the OVDD/L2OVDD voltages supplied.
Table 3 provides the recommended operating conditions for Rev. D devices. Though unchanged from the MPC755 RISC Microprocessor Hardware Specifications, recommended operating conditions for Rev. E devices are also included for clarity.
Table 3. Recommended Operating Conditions 1
Recommended Value Characteristic Symbol XPC755RX350TD XPC755RX350TE XPC755RX400TE XPC755RX400TD 2.0 100 mV 2.0 100 mV 2.0 100 mV 1.8 100 mV or 2.0 100 mV 3.3 165 mV 1.8 100 mV or 2.0 100 mV 3.3 165 mV 1.9-2.0 100 mV 1.9-2.0 100 mV 1.9-2.0 100 mV N/A 3.3 165 mV or 2.5V 125 mV N/A 3.3 165 mV or 2.5V 125 mV -40 to 105 2.0 100 mV 2.0 100 mV 2.0 100 mV Unit Notes
Core supply voltage PLL supply voltage L2 DLL supply voltage Processor bus BVSEL = 0 supply voltage BVSEL = 1
VDD AVDD L2AVDD OVDD OVDD
V V V V V V V C
2 2 2
L2 bus supply L2VSEL = 0 L2OVDD voltage L2VSEL = 1 L2OVDD Die junction temperature Tj
Notes: 1. These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not guaranteed. 2. 2.0 V nominal.
Table 6 provides the DC electrical specifications for Rev. D devices. Though unchanged from the MPC755 RISC Microprocessor Hardware Specifications, the DC electrical specifications for Rev. E devices are also included for clarity. Also note that the AC timing specifications given for Rev. E devices are guaranteed for both 2.5 V and 3.3 V operation.
MOTOROLA
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
3
General Parameters Table 6. DC Electrical Specifications
At recommended operating conditions (see Table 3)
Characteristic Input high voltage (all inputs except SYSCLK)
Nominal Bus Voltage1 1.8/2.0 2.5 3.3
Symbol VIH
Min 0.65 x (L2)OVDD 1.6 2.0
Max (L2)OVDD + 0.3 (L2)OVDD + 0.3 (L2)OVDD + 0.3 0.35 x (L2)OVDD 0.6 0.8 OVDD + 0.3 OVDD + 0.3 OVDD + 0.3 0.2 0.4 0.4 -- -- -- 0.45 0.45 0.4
Unit V
Notes 2,3,4 5 2,3
Input low voltage (all inputs except SYSCLK)
1.8/2.0 2.5 3.3
VIL
-0.3 -0.3 -0.3
V
2,4 5
SYSCLK input high voltage
1.8/2.0 2.5 3.3
KVIH
1.5 1.8 2.4
V
4 5
SYSCLK input low voltage
1.8/2.0 2.5 3.3
KVIL
-0.3 -0.3 -0.3
V
4 5
Output high voltage, IOH = -6 mA
1.8/2.0 2.5 3.3
VOH
(L2)OVDD - 0.45 1.7 2.4
V
4 5
Output low voltage, IOL = 6 mA
1.8/2.0 2.5 3.3
VOL
-- -- --
V
4 5
Notes: 1. Nominal voltages; see Table 3 for recommended operating conditions. 2. For processor bus signals, the reference is OVDD. L2OVDD is the reference for the L2 bus signals. 3. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK) and IEEE 1149.1 boundary scan (JTAG) signals. 4. XPC755BRX350TD and XPC755BRX400TD only. 5. XPC755BRX350TE and XPC755BRX400TE only.
1.4.2.2 Processor Bus AC Specifications
All Rev. D part numbers have slower AC timing characteristics than later revisions of the part. The affected processor bus AC timing specifications are given in Table 10. Though unchanged from the MPC755 RISC Microprocessor Hardware Specifications, the AC timing characteristics for Rev. E devices are also included for clarity.
4
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
MOTOROLA
General Parameters Table 10. Processor Bus AC Timing Specifications
At recommended operating conditions (see Table 3)
Parameter
Symbol
XPC755BRX350TD XPC755BRX400TD Min Max -- -- 4.5
XPC755BRX350TE XPC755BRX400TE Min 0.6 0.2 -- Max -- -- 4.1
Unit
Input Hold Times: TLBISYNC, MCP, SMI Input Hold Times: All Inputs except TLBISYNC, MCP, SMI Valid Times: All Outputs
tIXKH
0.6 0.6
ns
tKHOV
--
ns
1.4.2.4 L2 Bus AC Specifications
The AC timing characteristics of the L2 bus interface in 3.3 V mode are slower for Rev. D than for Rev. E devices. Additionally, the AC timing of the L2 interface is not guaranteed or tested in 1.8 V/2.0 V mode for Rev. D devices and does not meet these specifications. The L2 interface output drivers may display a non-linear, stepped behavior when switching that prolongs the rise and fall times in this mode. This behavior is dependent on L2OVDD, the impedance of the circuit board, and operating conditions of the processor. In a worst-case device, at L2OVDD = 1.8 V and Tj = 105C, the driver output impedance is 55 ; at L2OVDD = 2.0 V and Tj = 105C, the driver output impedance is 47 . The non-linear behavior results when the driver output impedance is greater than the board impedance and can cause reflected wave switching instead of incident wave switching. The voltage level at which the step will occur is Vstep = L2OVDD x [Zboard / (Zout + Zboard)]. If Vstep is less than the input high threshold voltage of the SRAM, the SRAM will not recognize a logical high on a given signal until the reflected wave arrives. The time delay between the arrival of the incident wave and the reflected wave is determined solely by the propagation delay of the signal. Because of these issues, Motorola does not recommend or support the use of the L2 bus interface of Rev. D devices in 1.8 V/2.0 V mode. Table 12 provides the L2 bus interface AC timing specifications for the Rev. D devices described in this document when the L2 bus interface is in 3.3 V mode only; note Rev. D devices do not support 2.5 V I/O. Though unchanged from the MPC755 RISC Microprocessor Hardware Specifications, the L2 Bus AC timing characteristics for Rev. E devices are also included for clarity. Also note that the L2 Bus AC timing specifications given for Rev. E devices are guaranteed for both 2.5 V and 3.3 V operation and that Rev. E devices do not support 1.8 V/2.0 V mode.
MOTOROLA
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
5
Ordering Information Table 12. L2 Bus Interface AC Timing Specifications
At recommended operating conditions (see Table 3)
Parameter
Symbol
XPC755BRX350TD XPC755BRX400TD Min Max -- -- 3.6 3.8 4.0 4.2 3.5 4.0 4.2 4.5
XPC755BRX350TE XPC755BRX400TE Min 1.2 0 -- -- -- -- -- -- -- -- Max -- -- 3.1 3.2 3.3 3.7
Unit
Notes
Setup Times: Data and parity Input Hold Times: Data and parity
tDVL2CH tDXL2CH
1.5 0.5 -- -- -- -- -- -- -- --
ns ns ns
2 2 3, 4
Valid Times: tL2CHOV All outputs when L2CR[14-15] = 00 All outputs when L2CR[14-15] = 01 All outputs when L2CR[14-15] = 10 All outputs when L2CR[14-15] = 11 L2SYNC_IN to high impedance: tL2CHOZ All outputs when L2CR[14-15] = 00 All outputs when L2CR[14-15] = 01 All outputs when L2CR[14-15] = 10 All outputs when L2CR[14-15] = 11
ns 2.4 2.6 2.8 3.0
3, 5
Notes: 2. All input specifications are measured from the midpoint of the signal in question to the midpoint voltage of the rising edge of the input L2SYNC_IN. Input timings are measured at the pins. 3. All output specifications are measured from the midpoint voltage of the rising edge of L2SYNC_IN to the midpoint of the signal in question. The output timings are measured at the pins. All output timings assume a purely resistive 50- load. 4. The outputs are valid for both single-ended and differential L2CLK modes. For pipelined registered synchronous BurstRAMs, L2CR[14-15] = 01 or 10 is recommended. For pipelined late write synchronous BurstRAMs, L2CR[14-15] = 11 is recommended. 5. Guaranteed by design and characterization.
1.10 Ordering Information
1.10.1 Part Numbers Addressed by This Specification
Table 20 provides the ordering information for the MPC755 parts described in this specification.
6
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
MOTOROLA
Document Revision History Table 20. Part Numbering Nomenclature
XPC
Product Code XPC 2
755
Part Identifier 755
B
Process Descriptor
xx
Package
nnn
Processor Frequency 1 350 400
x
Application Modifier T: 2.0 V 100 mV -40 to 105C
x
Revision Level D: 2.7; PVR = 0008 3203 E: 2.8; PVR = 0008 3203
B = HiP4DP RX = CBGA
Notes: 1. Processor core frequencies supported by parts addressed by this specification only. Parts addressed by other specifications may support other maximum core frequencies. 2. The X prefix in a Motorola part number designates a "Pilot Production Prototype" as defined by Motorola SOP 3-13. These are from a limited production volume of prototypes manufactured, tested, and Q.A. inspected on a qualified technology to simulate normal production. These parts have only preliminary reliability and characterization data. Before pilot production prototypes may be shipped, written authorization from the customer must be on file in the applicable sales office acknowledging the qualification status and the fact that product changes may still occur while shipping pilot production prototypes.
1.10.3 Part Marking
Parts are marked as the example shown in Figure 29.
MPC755B RX400TD MMMMMM ATWLYYWWA
755 BGA Notes: MMMMMM is the 6-digit mask number. ATWLYYWWA is the traceability code. CCCCC is the country of assembly. This space is left blank if parts are assembled in the United States.
Figure 29. Part Marking for BGA Device
Document Revision History
Table B provides a revision history for this hardware specification.
Table B. Document Revision History
Revision No. 0 Initial release. Substantive Change(s)
MOTOROLA
MPC755 Part Number Specification for the XPC755BxxnnnTx Series
7
HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-303-675-2140 or 1-800-441-2447 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, 2 Dai King Street Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: 1-800-521-6274 HOME PAGE: http://www.motorola.com/semiconductors DOCUMENT COMMENTS: FAX (512) 933-2625 Attn: RISC Applications Engineering
Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. (c) Motorola, Inc. 2002
MPC755BTXPNS/D


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